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{| class="wikitable" align="right"
|- bgcolor="#ddeeff" align="center"
|colspan="2"|'''INPUT'''<br />A &nbsp; B || '''OUTPUT'''<br /> A + B
|- bgcolor="#ddffdd" align="center"
|0 || 0 || 0
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Sunt tria symboli pro portis AUT: symbolum [[ANSI]] ("Americanum" aut "militare"), symbolum [[IEC]] ("Europaeum" aut "rectangulare") aut [[IEEE]], et obsoletum symbolum [[DIN]]. Lex IEEE et symbolos "''formarum distinctarum''" et "''formarum rectangularum''" pro portis logicis simplicis permittit. Si vis, vide etiam [[Porta logica#Symboli|Symboli Portae Logicae]].
 
<gallery>
{| align=center style="text-align:center"
Fasciculus:OR ANSI Labelled.svg|''Symbolum MIL/ANSI'' <ref>{{cite book|url=http://books.google.com/books?id=74amDes2TE8C&pg=PA59&lpg=PA59&dq=mil+logic+gate+symbols&source=bl&ots=k8crBOmev5&sig=zwzDQrqq86ZfzSVLhqdEJ1dbpWs&hl=en&ei=fTnbTMzuI8uUnAfy3cEW&sa=X&oi=book_result&ct=result&resnum=5&ved=0CCkQ6AEwBA#v=onepage&q=mil%20logic%20gate%20symbols&f=false|title=Aircraft Electrical and Electronic Systems|author=Michael H. Tooley, Mike Tooley, David Wyatt|page=59|publisher=Butterworth-Heinemann|language=Anglice|year=2008}}</ref>▼
|[[Fasciculus:OR ANSI Labelled.svg]]
Fasciculus:IEC OR.svg|''Symbolum IEC/IEEE'' <ref>{{cite book|url=http://www.ddpp.com/DDPP3_pdf/IEEEsyms.pdf|title=Digital Design Principles and Practices|author=John F. Wakerly|edition=4a|year=2005|isbn=0-13-186389-4|publisher=Prentice Hall}}</ref>▼
|[[Fasciculus:IEC OR.svg]]
|[[Fasciculus:OR DIN.svg]]|Symbolum DIN
</gallery>
|-
▲|''Symbolum MIL/ANSI'' <ref>{{cite book|url=http://books.google.com/books?id=74amDes2TE8C&pg=PA59&lpg=PA59&dq=mil+logic+gate+symbols&source=bl&ots=k8crBOmev5&sig=zwzDQrqq86ZfzSVLhqdEJ1dbpWs&hl=en&ei=fTnbTMzuI8uUnAfy3cEW&sa=X&oi=book_result&ct=result&resnum=5&ved=0CCkQ6AEwBA#v=onepage&q=mil%20logic%20gate%20symbols&f=false|title=Aircraft Electrical and Electronic Systems|author=Michael H. Tooley, Mike Tooley, David Wyatt|page=59|publisher=Butterworth-Heinemann|language=Anglice|year=2008}}</ref>
▲|''Symbolum IEC/IEEE'' <ref>{{cite book|url=http://www.ddpp.com/DDPP3_pdf/IEEEsyms.pdf|title=Digital Design Principles and Practices|author=John F. Wakerly|edition=4a|year=2005|isbn=0-13-186389-4|publisher=Prentice Hall}}</ref>
|''Symbolum DIN''
|}
 
== Aequatio Booleanam ==
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Porta AUT cum inducta A et B, et eductum C hunc aequationem logica effecit:
 
C = A + B
{| align=center style="text-align:center"
|<math>C = A + B</math>
|}
 
== Forma ==
 
<gallery>
{|
Fasciculus:NMOS OR gate.png|thumb|NMOS OR Gate
|-
| [[Image:NMOS OR gate.png|thumb]] || [[ImageFasciculus:CMOS OR.svg|thumb|CMOS OR Gate]]
</gallery>
|}
 
=== Forma alterna ===
 
[[Fasciculus:OR Using NAND.svg|thumb|right|Porta AUT quae solum ex portis NON-ET constructa est.]]
 
Si portae AUT propriae non adsunt, porta AUT ex portis NON-ET (ut schema ad dextram) aut NON-AUT creare potest, quia illae portae sunt ''portae universales'',<ref>{{cite book
|author=M. Morris Mano et Charles R. Kime|title=Logic and Computer Design Fundamentals|edition=3a|publisher=Prentice Hall|year=2004|page=73}}</ref> quod portas NON-ET aut NON-AUT creare portas omnes alias potere significat. Quamquam portae XAUT portas alias creare possunt, est rarum.
 
== Notae ==▼
 
<references/>▼
 
== Vide etiam ==
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[[tr:VEYA kapısı]]
[[zh:或门]]
 
 
▲== Notae ==
 
▲<references/>
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